A data center server hall.
By Ellis Ward | November 10, 2026
For years, Google released one TPU generation at a time. This year it released four.
The company unveiled the TPU 8tx and the TPU 8i Max on November 9, bringing its total eighth-generation TPU systems to four in a single calendar year. Amin Vahdat, Google's SVP and chief technologist for AI and infrastructure, confirmed that is a first in the program's history. The pace alone signals a change in how Google thinks about chip design. Rather than build one architecture that attempts to do everything, Google is now shipping a family of chips where each member targets a specific constraint.
The TPU 8tx Closes the Security Gap in Active Compute
The TPU 8tx addresses confidential computing. In most systems, data must be decrypted in memory before a processor can work with it. That window - when information sits unprotected while being actively used - is where sensitive data is exposed. The 8tx aims to close it.
The chip pairs TPU 8t silicon with AMD fifth-generation EPYC host CPUs. Together they keep data and model weights isolated and protected during processing, not only at rest or in transit. Google says a single 8tx system can serve, fine-tune, and distill on private data without moving it between clusters. For regulated industries or organizations running proprietary models, that constraint matters: data stays where it starts.
Google also claims the 8tx delivers up to two times lower latency than the standard 8t, with a near-zero performance penalty for the added security. Those numbers are Google's own. No independent benchmarks have been published.
The TPU 8i Max Attacks the Memory Wall
The TPU 8i Max takes on a different problem. As AI models grow larger and tasks stretch into longer contexts, memory becomes the bottleneck. Agents parsing entire codebases, processing hours of video, or running extended scientific computations hit hard limits on how much data a chip holds and how fast it moves that data around. More compute does not help if the chip cannot feed it.
Google's approach is to double everything at once. The 8i Max places two TPU 8i chips on a single package, which doubles compute capacity, doubles on-chip SRAM to 768 megabytes (per TechTarget reporting as cited in launch coverage), and doubles HBM bandwidth to 17.2 terabytes per second. Google positions it for drug discovery and advanced mathematics research, alongside AI agents working across full codebases or long video sequences.
As with the 8tx, those specifications are Google's own claims. No third-party validation has been published for the 8i Max.
The Full Eighth-Generation Family
The two new systems join chips Google introduced at Google Cloud Next in April. The TPU 8t, built for training, delivers up to 2.7 times better training performance than the previous generation, according to Google. The TPU 8i, designed for inference, offers 80 percent better inference price-performance, again by Google's figures.
The four together now divide work that a single architecture once handled alone. Training goes to the 8t. Inference goes to the 8i. Memory-intensive reasoning goes to the 8i Max. Sensitive workloads go to the 8tx. The division is deliberate, and the year's release schedule makes the logic visible.
Availability and Pricing
Bloomberg reported that both the TPU 8tx and the TPU 8i Max are scheduled for 2027. No pricing has been published for either chip. The 8t and 8i are already available through Google Cloud; the two newer systems have no confirmed rollout date beyond the 2027 window Bloomberg cited.
Nvidia's Situation and a Compatibility Bridge
The announcements landed while Nvidia managed a different kind of attention. Bloomberg and BusinessDay reported that Nvidia faces a board investigation into alleged diversion of restricted chips. The nature and outcome of that investigation remain unclear from public reporting, and no findings have been confirmed. BusinessDay framed Google's chip progress as potentially significant given that backdrop, though Google and Nvidia have been competing in the AI chip market for several years regardless of recent events.
Separately, Google and Meta open-sourced TorchTPU, a compatibility layer that lets PyTorch code written for Nvidia GPUs run on TPUs without a full rewrite. Developers who want to test TPU alternatives do not have to start their codebase from scratch.
Four Systems, One Year
What stands out about 2026 in Google's chip program is the pattern. Four systems in twelve months, each shaped around a constraint that slows real AI deployments: training throughput, inference cost, memory capacity, and data privacy. That mapping suggests the specialization responds to actual customer needs as much as it reflects internal engineering choices.
All performance figures cited in this article are Google's own claims. Independent testing has not been published for any eighth-generation TPU system. Pricing has not been announced for any of the four chips.
